CPO optical modules and computing chips

CPO (Co-Packaged Optics) integrates optical modules directly with computing chips to dramatically improve bandwidth, reduce power consumption, and minimize latency in AI and high-performance data centers.

Overview of CP

O TechnologyCPO is a next-generation optical interconnect technology that tightly integrates the optical engine (OE) with a switch or processing ASIC on the same package or substrate, reducing the electrical signal path from centimeters to millimeters. Unlike traditional pluggable optical modules, which are discrete and hot-swappable, CPO modules are co-located with the chip, enabling higher bandwidth density, lower latency, and significant power savings—often up to 30–50% compared to conventional optics. This integration is particularly critical for AI clusters and high-performance computing (HPC) systems, where network speed demands exceed 800G and can reach 1.

6T or higher. Key Components and PackagingCPO modules combine photonic components (lasers, modulators, photodetectors) with electronic drivers and transimpedance amplifiers (TIAs) on a single substrate. Core enablers include: Silicon Photonics (SiPh) for high-speed optical signal generation and detectionAdvanced packaging techniques such as 2.

5D/3D integration and flip-chip mounting to reduce signal path lengths High-density substrates like silicon interposers or organic packages for multi-chip integration Flip-chip packaging is often used to mount the ASIC or GPU directly onto the substrate, improving heat dissipation and electrical performance while enabling dense optical interconnects.

Advantages for Computing Chips

Integrating CP

O with computing chips offers several benefits: Reduced latency: Shorter electrical paths minimize signal delay Lower power consumption: Less energy is required for electrical-to-optical conversion, improving performance per watt Higher bandwidth density: More data can be transmitted per unit area, supporting AI workloads and large-scale HPC systems Improved reliability: Reduced crosstalk and signal degradation compared to long copper traces CPO also allows for scalable AI compute trays, where multiple XPUs can be connected via thousands of optical fibers, achieving aggregate bandwidths exceeding 100 Tbps in compact 1U form factors.

Industry Adoption and Future Trends

Leading semiconductor companies like TSMC and Nvidia are actively developing CPO-enabled chips.

TSM

C has demonstrated CPO integration at its 3-nm process node, while Nvidia plans to adopt CPO in its GB300 and Rubin architectures to overcome NVLink limitations. The technology is expected to become commercially viable for AI and HPC applications by mid-2025, with mass production targeting 1. 6T optical transmission rates.

CP

O represents a paradigm shift in data center architecture, moving from traditional pluggable optics to tightly integrated optical-electronic packages, enabling energy-efficient, high-bandwidth, and low-latency interconnects essential for next-generation AI and cloud computing infrastructure.